Integrated circuit design and fabrication is a vastly complex effort involving interaction among numerous interconnected conducting layers. A thorough understanding of the limitations of the various conducting layers is required for proper use of the fabrication process. The conducting shapes, or wires, must be designed so that the desired electronic circuit function is implemented at the resulting end of chip manufacture. Frequently, millions and even hundreds of millions of transistors can exist on a single semiconductor chip. Each transistor must be connected to other transistors so that the desired circuit operation results. The ability to design chips with such large numbers of essential transistors and wires is certainly problematic. Optimization of such circuitry can be a daunting task even with the help of electronic design automation (EDA) software tools.
There are numerous metal lines, polysilicon shapes, and diffusions in close proximity to one another on each semiconductor chip, all of miniscule dimension, which must be fabricated to exacting tolerances. As technologies advance, smaller and smaller dimensions are used in lithography. All of these semiconductor layers must be designed and fabricated to exacting tolerances. These tight tolerances mean that wherever conducting materials are separated by an insulator or are located near other structures on an integrated circuit, a capacitance results. Further, because of the miniscule dimensions of the conductors, resistance is introduced, inhibiting signals passing along the conductors. These capacitances and resistances are considered parasitics, and vary widely with operation depending on the underlying integrated circuit (IC) process, temperature, and voltage variations. Thus, in order for the resulting electronic circuit to function correctly, it is critical to understand the nature of these capacitances and resistances by extracting their values from the physical layout of the IC. After their values have been extracted, EDA tools may then be used to verify proper circuit operation for the various operating corners.